1. Field of the Invention
This invention pertains generally to an electrical switching element, and more particularly to a gated nano-electro-mechanical switch utilized in place of conventional switching transistors within logic and memory circuits.
2. Description of Related Art
Power consumption has emerged as a major challenge for continued scaling of CMOS technology. In particular, static (leakage) power is an issue because it increases exponentially with reductions in gate length and gate-dielectric thickness. Dynamic power is difficult to reduce by scaling the supply voltage (VDD), because of threshold voltage (VT) variability and non-scalability due to fundamental thermal limits which dictate that leakage current increases exponentially with decreasing VT.
In general, there exist four main areas to this scaling problem: (1) drain leakage which doubles with each successively smaller generation of CMOS; (2) attempts to ameliorate gate leakage necessitate utilizing advanced gate dielectric materials from which cost and process integration issues arise; (3) threshold voltage control and reduction issues arise with variability resulting in yield issues, and in which non-scalability arises in response to the thermal limit (kT/q) making supply-voltage (VDD) scaling difficult; (4) performance gains as technology scales down are controverted by parasitic resistance and capacitance which seriously limit performance in nanoscale transistors.
Potential technological solutions to this challenge include alternative transistor structures (e.g., thin-body MOSFETs) and high-mobility semiconductor channel materials (e.g., Ge, GaAs). However, drain leakage due to quantum-mechanical tunneling and VT variability and non-scalability remain as issues for these approaches in the sub-10 nm gate-length regime. In addition, the formation of uniform ultra-thin or narrow films and fins present a number of manufacturing challenges. In addition, the use of high-mobility channel materials poses a myriad of process integration challenges while performance benefits over Si are not dramatic. Still further, none of these proposed solutions address challenges for radiation hardness and high-temperature operation.
Therefore, electronic switching methods and devices are needed which can dramatically lower power consumption, such as in digital logic and memory devices while providing radiation hardness.